1. What is memory segmentation? How it is implemented in 8086? Explain with illustration. ?

1 Answer

  • 4 weeks ago

    I'll stick to the 8086 idea of segmentation.  Other processors have different ways to approach this.

    Two goals for the 8086 (and 8088) were to expand the limits of the earlier 8080 and 8085 processors.  The earlier processors had 8-bit registers and a 16-bit address bus allowing for a maximum of 64K bytes of system memory (code + data).  The 8086 had 16-bit registers and a 20-bit address bus.  That gives a maximum of 1MB of system memory (code + data)

    The 16-bit register size still put a limit of 64 KB of memory that could be addressed by any single register.  To overcome this limitation, four segment registers were added for different types of memory references ("code", "data", "stack" and "extra"). There were only 16 bits in each segment register, but they were the high 16 bits of the 20-bit address (A4-A19).  The segment register bits, padded with 4 low-order zeroes, gave the starting address of a segment in the 1MB address space.  Appending 4 binary zeros is the same as multiplying by 16, so a segment could start on any memory address evenly divisible by 16.

    Every machine instruction fetch used the code segment register, every stack push or pop used the stack segment, and most data accesses used the data segment (though most data operations could optionally use one of the other segments instead).  Every memory access would expand the 16 bit offset and 16 bit segment register values to 20 bits and add them to get a 20 bit physical memory address.

    The closest thing to a picture I can offer is this:

    data offset              xxxx            0xxxx

    segment register    yyyy   -->  + yyyy0


    20 bit physical memory addr     zzzzz

    The xxxx quantity is a 16 bit offset (4 hex digits) computed by adding base register, index register and/or offset value from an instruction.  Any overflow or carry from that is discarded.

    The yyyy quantity is the 16-bit segment register contents (again, 4 hex digits).  The final physical address is obtained by adding the left-padded offset to the right-padded segment value.

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