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Anonymous
Anonymous asked in Science & MathematicsEngineering · 2 months ago

How to create a multiple input NAND gate using three IC inverters with maximum input?

For my electronics logic course, I need to build a multiple input NAND gate using all the inputs (or max input possible) from three ICs - the 7400 2-input NAND IC, the 7404 1-input NOT IC and the 7410 and the 3-input NAND IC. I guess what that means is that I have to use all the gates of each IC and they need to all reduce to one NAND gate at the end but I also have to use all the inputs I can use.

The 7400 has 8 max inputs; the 7404 has 6 max inputs; the 7410 has 9 max inputs. How would I go about reducing all of these inputs into one NAND gate output?

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  • 2 months ago
    Favourite answer

    So you have 4, 2-input NAND; 3, 3-input NAND, and 6 inverters.

    That means you can use one of the NAND gates (doesn't matter which one) as the output stage, and use the remaining 6 inverters on the outputs of the remaining 6 NAND gates to change them into AND gates.

    Then chain the outputs of the AND gates into the final NAND stage, pretty much in any topology, as long as you connect outputs to inputs.  Each 2-input AND gate adds one input to those already there, and each 3-input AND gate adds two inputs where there was one before.  So you will have an 11-input NAND no matter how you arrange it, if you use everything.

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  • 2 months ago

    see below, seems simple...

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  • 2 months ago

    You can tie inputs together without issue and the same for outputs.

    You can even parallel entire gates in the same IC. They may get hot at speed but for a class exercise it is no problem.

    • roderick_young
      Lv 7
      2 months agoReport

      I didn't downvote, but think that a class is the place where it's especially important to learn good engineering practices.  Connecting totem-pole logic outputs is not good practice.

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